Electrical Characterisation and Modelling of Schottky barrier metal source/drain MOSFETs
Dominic Pearman. University of Warwick

In this work, the electrical properties under DC bias conditions of p-channel SBMOSFETs with PtSi sources and drains are explored at room temperature and down to 80 K. High room temperature ON currents up to 545 mA/mm and transconductances up to 640 mS/mm for 85 nm gate length devices are measured and performance factors are found to satisfy ITRS recommendations. Increasing silicide anneal temperatures lead to increases in Schottky barrier height and corresponding decreases in drain current are observed.
The radio-frequency performance at frequencies up to 110 GHz is studied using a novel measurement deembedding technique. High unity-gain cutoff frequencies up to 71 GHz are extracted. Finally, two-dimensional simulations using the drift-diffusion simulator MEDICI are performed and fitted to the measured electrical characteristics.