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As counterfeiters continue to up their game, technology's quest for the ultimate method of proving authenticity goes on.
Are you sure you want to delete this scoop?
Do you have a backup plan for your treasured photos?
Just imagine all the thousands of photos stored in phones, digital cameras and laptops. But what happens when you want to upgrade them, or heaven forbid, your device is lost or stolen?
Another great article from The *Official AndreasCY* ~ http://mcaf.ee/2b5x3
OK, enough with octa-core mobile monstrosities for now. Let’s shift gears to Embedded World 2014 and the lower end of the spectrum, one that will make up the vast majority of devices on the Internet of Things: tiny, low power microcontrollers with integrated wireless connectivity. There still seems to be some stigma about putting RF into designs, and some of it is justified. One of our readers commented this week that Apple “does not have the know-how” in reference to integrated baseband LTE. On the contrary, I’d say: Apple can buy any IP or talent they want. Their reluctance stems more from the realities of supply chains and multiple carrier qualifications facing different requirements in worldwide markets, not a technology issue per se. RF designs still need proper care and feeding and regulatory clearance. We continue to see strides in RF integration – with attention now turning to
10313Since Synopsys acquired Eve over a year ago, they haven't announced anything new in the ZeBu product line. Emulators are not like software where you expect incremental releases a couple of times per year, each new "release" is a complete re-design using new hardware fabric in a new process technology. Earlier this week Synopsys announced Zebu Server-3, currently the industry's fastest emulation system (to be fair, whenever a new emulation product is announced it tends to be the fastest for a time...). They also announced a collaboration with Imagination Technologies to enable faster emulation, currently for Imagination's PowerVR GPUs and in the future for the MIPS processor line too. Imagination are achieving clock speeds of 3.5MHz emulating their GPUs, compared to historic speeds closer to 1MHz with earlier generations of emulators.10314ZeBu servers come in a 20" cube weighing 155lbs and consuming less than 2.5KW. Inside there are Zebu modules (boards)
The time has come for America’s business leaders to consider anew how they work with the nation’s educators to support our schools. A number of trends are ...
Download the interactive PowerPoint at slidedocs.com! Nancy Duarte’s fourth book, Slidedocs, introduces a new medium: slidedocs. Slidedocs are visual documen...
given on 10 Nov, 2013 @ New Delhi, India.
Twitter Bootstrap Training - Local and Small Businesses A blog about this video will be posted @ http://socialmediain7minutes.info by 03/05/14 Receive notifi...
Did you know in the Xilinx Virtex 28nm series you can REALLY run the DSP at 741 MHz? I say ‘really’ as you know dear reader, not all the FPGA claims of speed and usage tends to live up to reality. I cannot stand marketing games where you can run at a GHz ‘But’ and then comes the list of gotcha’s. Don’t believe me? Whaaat? Well let’s take a journey through a REAL example of a Parallel FIR filter that runs in REAL silicon TODAY running the DSP at 741 MHz. By the way, my kids laugh every time I say FIR filter.Why did the digital filter designer get attacked by ‘People for the Ethical Treatment of Animals’?‘He was selling FIRs’.I know my poor kids, once again please pray.So let us begin, what is a FIR filter? ‘FIR’ stands for Finite Impulse Response. DSP 101. They are the heart of
St. Francis Xavier said “Give me the child until he is seven and I'll give you the man." ARM is not going for them quite that young but this week they announced their "lab in a box" for participating universities worldwide. It is actually a joint launch between the ARM University Program (which is not new) and various partners. Since ARM doesn't actually make any silicon themselves, they can't supply everything needed themselves even if they wanted to.So what is in the "lab in a box" (LiB)?10346The LiB package includes hardware boards from ARM partners, software licenses from ARM, and complete teaching materials ready to be immediately deployed in classes. Current partners supplying hardware boards include Freescale and NXP. The full contents of the box are as follows: 10 x ARM-based development boards 100 x ARM Keil MDK-ARM Pro 1-year, renewable software
10326Integration is often an underrated attribute of good tools, compared to raw performance and technology. But these days integration is differentiation (try telling that to your calculus teacher). Today at DVCon Synopsys announced Verification Compiler which integrates pretty much all of Synopsys's verification technologies (including the technology acquired in the SpringSoft acquisition) into a single tool. Verification Compiler is a complete portfolio of integrated, next-generation verification technologies that include advanced debug, static and formal verification, simulation, verification IP and coverage closure. Together these technologies offer a 5X performance improvement and a substantial increase in debug efficiency, enabling SoC design and verification teams to create a complete functional verification flow with a single product.10327Existing methodologies using disparate tools are not very efficient, involving, as they do, duplicate steps, incompatible databases, multiple debug environments, inconsistent coverage metrics which all impact ease-of-use and productivity. And not in a good way.Verification compiler ties together
I started using internal EDA tools at Intel beginning in 1978 and have worked in the commercial EDA industry since 1986, so it was a delight to read a chapter about EDA in Nenni and McLellan's newest book: Fabless - The Transformation of the Semiconductor Industry. Starting in the 1970's the authors talk about EDA, Phase One and how painfully manual the whole process of designing an Integrated Circuit was. I'll never forget working at Intel at the time and performing manual Design Rule Checks (DRC) on an IC layout, when I stopped to ask my manager, "Hey, what about using a software program to automate this tedious task?"
The EU and all EU Member States have become more innovative in recent years. As a result, the EU has closed half of the innovation gap towards the US. Howeve...
INBOUND 2013 presentation by Mike Volpe. Register for INBOUND 2014 at www.inbound.com
A semiconductor SoC design can have multiple components at different levels of abstractions from different sources and in different languages. While designing an SoC, IPs at different levels have to be integrated without losing the overall design goals. Of course, quality of an IP inside and outside of an SoC must be tested thoroughly. Considering today’s large SoC designs with multiple IPs, it’s imperative that effective debugging tools with easy and quick visualization, navigation, annotations etc. are a must for designers to make right decisions during the course of design. The designers should be able to easily analyze different parts of the design which can be in different languages such as Spice, Verilog, VHDL, SystemVerilog etc. and can have different levels of voltages and signals.Last week I attended a webinar (http://www.semiwiki.com/cgi-bin/clickthru.pl?http://www.edadirect.com/page.php?s=e) on Mixed Signal SoC Verification hosted by EDA Direct (http://www.semiwiki.com/cgi-bin/clickthru.pl?http://www.edadirect.com/) where they showcased StarVisionTM tool from Concept Engineering (http://www.semiwiki.com/cgi-bin/clickthru.pl?http://www.concept.de/)